Multichip Module Design: Substrates, Layout, and Thermal Management

What Is a Multichip Module?

A multichip module (MCM) is an electronic assembly that contains multiple unpacked integrated circuit dice mounted on a common substrate, with the dice interconnected by conductors on the substrate. MCMs are distinguished from standard hybrid microcircuits primarily by their higher interconnect density, the complexity of the substrate (often containing multiple conductor layers), and the tighter integration of the component dice within a single module.

MCMs are used when the performance, size, or electrical requirements of a system cannot be met by mounting individual packaged ICs on a PCB. The key value proposition of MCMs is: reduced interconnect length (improving speed and reducing parasitic inductance and capacitance), reduced package footprint (critical for portable and miniaturised electronics), improved electrical performance (lower noise, higher speed), and improved reliability (fewer solder joints, no package-related failures).

MCMs are categorised by substrate type: MCM-D (deposited thin film on ceramic or silicon), MCM-C (cofired ceramic, including HTCC and LTCC), and MCM-L (organic laminate). Each substrate type has distinct cost, performance, and thermal management characteristics.

Substrate Selection

Alumina (Al2O3)

96% and 99.6% alumina remain the most widely used substrates for MCMs in military and aerospace applications. Alumina offers good mechanical strength, excellent dielectric properties (dielectric constant approximately 9.8), good thermal conductivity (24-30 W/mK), and well-understood manufacturing processes. The 96% alumina is cost-effective for thick film MCMs with moderate interconnect density; 99.6% alumina is used for thin film MCMs where surface quality and dimensional precision are critical.

Aluminum Nitride (AlN)

AlN is increasingly used for high-power MCM applications where thermal conductivity is the primary constraint. With thermal conductivity of 170-180 W/mK (approximately five times that of alumina), AlN enables significantly higher power dissipation in the same module footprint. AlN also has a CTE (4.5 ppm/C) that is closer to silicon than alumina, reducing thermal stress at die attach interfaces. The primary drawback is higher cost and less mature manufacturing infrastructure compared to alumina.

LTCC (Low Temperature Co-Fired Ceramic)

LTCC is the dominant substrate for commercial RF and wireless MCMs, particularly for applications from 1 GHz to 110 GHz. LTCC enables multilayer structures with embedded passives (resistors, capacitors, inductors), reducing the module footprint and eliminating discrete SMT components. The 850-900 degree C firing temperature allows silver (Ag) and gold (Ag) conductors, providing excellent RF performance. Common LTCC tape systems include DuPont 943 and 9k7, Heraeus 800, and Ferro A6. Murata, Kyocera, and TDK are the dominant global LTCC substrate manufacturers.

HTCC (High Temperature Co-Fired Ceramic)

HTCC is used for MCMs requiring maximum thermal performance and hermeticity in demanding environments. HTCC cofired modules with tungsten (W) or molybdenum (Mo) conductors are the standard for military and aerospace applications where the module must be hermetic. The 1600 degree C cofiring temperature is incompatible with silver and gold conductors, limiting HTCC to applications where the conductivity of W or Mo is acceptable. HTCC is more expensive than LTCC due to the higher firing temperature and the need for reducing atmosphere furnaces.

Organic Laminates

High-performance organic substrates (buildup multilayer on polyimide, LCP, or high-Tg FR-4) are used for commercial and some military MCM applications where cost and volume are the primary drivers. Organic MCM substrates offer lower dielectric constant than ceramic (advantageous at high frequencies), lower cost at high volumes, and compatibility with standard PCB manufacturing equipment. However, organics cannot match the thermal conductivity or hermeticity of ceramic substrates, limiting their use in high-power and high-reliability military applications.

Circuit Layout Principles

Fan-Out and Die Placement

The placement of dice on the MCM substrate is a critical design decision that affects thermal management, signal integrity, and manufacturing yield. Dice should be placed to minimise the thermal interaction between high-power dice, to allow adequate clearance for wire bonding and underfill, and to optimise the routing of critical signals. For flip-chip MCMs, the die placement must also account for the bump pattern and routing channels in the substrate.

For mixed-signal MCMs (containing both digital and RF dice), the layout must separate noisy digital circuits from sensitive RF circuits to prevent coupling of digital switching noise into the RF signal path. Ground planes and shielding structures in the substrate are used to isolate sensitive circuits.

Signal Routing

The substrate interconnect routing must satisfy the electrical requirements of the signals -- impedance control for RF and high-speed digital signals, cross-talk minimisation for high-speed buses, and power distribution integrity for the power and ground networks. For thin film MCM-D substrates, controlled-impedance transmission lines (microstrip or stripline) are designed into the substrate. For thick film MCM-C, the conductor geometry and dielectric properties must be characterised to achieve the required impedance.

Power Distribution

MCM power distribution networks must deliver stable supply voltages to each die despite the current draw of each IC and the IR drop across the substrate conductors. For high-current dice (processors, FPGAs, RF power amplifiers), the power network must be designed with adequate conductor width and thickness to keep IR drop within acceptable limits. Power and ground planes in multilayer substrates are essential for low-impedance power distribution at high frequencies.

Embedded Passives in LTCC

One of the key advantages of LTCC substrates is the ability to embed passive components within the ceramic multilayer structure. Embedded resistors are formed by printing resistor paste (ruthenium-based) at specific layers; the resistor value is determined by the geometry of the printed pattern and the sheet resistance of the paste. Embedded capacitors are formed by printing electrode layers separated by high-dielectric-constant ceramic layers (BME -- Base Metal Electrode capacitors using Ni or Cu electrodes are common in commercial LTCC).

Embedded inductors are formed by spiral conductor patterns within the LTCC stack. The Q-factor of embedded inductors is typically lower than discrete inductors (due to substrate losses), but the elimination of the discrete component from the surface saves significant area. Embedded passives in LTCC are most cost-effective at high volumes where the design and process development costs can be amortised.

Thermal Management Strategies

Thermal management is often the limiting factor in MCM design -- the performance of the dice is constrained by the ability to remove heat from the module. For air-cooled MCMs, the thermal resistance from die junction to ambient must be low enough to keep the die junction temperature below its rated maximum at the worst-case ambient temperature and power dissipation.

Thermal Vias

Thermal vias provide a low-resistance heat path from the die attach pad on the top surface of the substrate through to the bottom of the substrate (where it can be attached to a heat sink or cold plate). Thermal via arrays are standard in ceramic MCMs -- the thermal via pitch, diameter, and plating thickness determine the thermal resistance of the via array. Thermal simulation (FEA) is used to design the via array for the required heat load.

Heat Spreaders and Thermal Interface Materials

Copper and copper-tungsten (CuW) heat spreaders are attached to the back of high-power dice to reduce the thermal resistance from the die to the substrate thermal vias. The heat spreader increases the effective die footprint seen by the thermal via array, reducing the heat flux concentration at each via. Thermal interface materials (TIM -- thermal grease, phase change materials, or solder) are used at the die-to-heat spreader and heat spreader-to-thermal via interfaces to minimise contact resistance.

Cold Plates

For high-power MCMs (dissipating more than approximately 5-10 W), forced-air or liquid-cooled cold plates are required to achieve the required thermal resistance. The MCM is typically mounted to a carrier or lid that provides the thermal interface to the cold plate. The cold plate design must account for the MCM's power map (which areas are hot) and the coolant flow distribution within the cold plate.

I/O and Packaging Options

The MCM must be packaged to interface with the next level of assembly (typically a PCB). The packaging option determines the I/O count, the thermal path from the MCM to the next level, and the cost.

• Land Grid Array (LGA): The MCM substrate has an array of pads on its bottom surface that are soldered to a matching pad array on the PCB. LGA packaging provides the highest I/O density and is standard for flip-chip MCMs.
• Pin Grid Array (PGA): The MCM package has pins that are inserted into a socket on the PCB. PGA is used for MCMs that must be replaceable (field-replaceable units) or where the I/O count is too high for LGA.
• Ball Grid Array (BGA): The MCM substrate has solder balls on its bottom surface that are reflowed onto the PCB. BGA is the most common packaging option for commercial MCMs due to its cost-effectiveness and reliability.
• Cavity-down vs. cavity-up: In cavity-down packaging, the dice are mounted in a cavity in the substrate or package, with the die attach surface flush with the substrate surface. Cavity-up packaging has the dice mounted on the top surface. Cavity-down provides a shorter thermal path and is preferred for high-power applications.

Design for Manufacturability

DFM principles for MCM design address the manufacturing capabilities and limitations of the chosen substrate and assembly processes. Key DFM considerations include:

• Die placement accuracy: The MCM substrate must accommodate the placement tolerance of the dice (typically +/- 50-100 micrometres for epoxy die attach, +/- 25 micrometres for eutectic). The conductor routing must be designed to ensure that the bond pads remain accessible after die placement tolerance is accounted for.
• Wire bond routing clearance: Each die has a wire bond fan-out zone -- the area around the die perimeter where wire bonds will be routed to substrate pads. The substrate design must provide adequate routing channels for the wire bonds without crowding that could cause wire short circuits.
• Underfill and encapsulation clearance: For flip-chip MCMs, the underfill must flow completely under the die without voids. The underfill gap (die-to-substrate standoff) and the die size determine the underfill flow time and the risk of voiding. Design rules from the assembly house should be followed.
• Testability: The MCM should be designed with test points accessible for electrical test before final packaging. This allows defective substrate assemblies to be detected before expensive operations like lid sealing are performed.

Electrical Testing Strategies

MCM electrical testing is performed in stages to detect defects at the lowest-cost stage before expensive operations consume additional value. The typical test sequence:

1. Substrate electrical test: The bare substrate is tested for opens and shorts in the conductor network using a flying probe tester or dedicated test fixture. This detects substrate manufacturing defects before dice are attached.
2. Mid-assembly test: After die attach and wire bonding (but before sealing or coating), the MCM is tested for opens and shorts in the die-to-substrate interconnect. Probe access points or active probe testing is used.
3. Final electrical test: After sealing and any coating, the MCM is tested over temperature (room, hot, cold) to verify all electrical parameters. Burn-in (accelerated life testing at elevated temperature and bias) is performed on a sample basis for high-reliability applications.

Reliability Qualification

MCM reliability qualification follows the applicable reliability standard for the application (MIL-PRF-38534 for military hybrids, AEC-Q100 for automotive, JESD47 for commercial). The qualification test sequence typically includes: unbiased accelerated life testing (HAST or THB for humidity resistance), temperature cycling, high temperature storage, mechanical tests (shock, vibration, acceleration), and if applicable, radiation hardness qualification for space applications. The qualification is performed on a representative sample of the MCM design and must be repeated if the design or manufacturing process changes in a way that could affect reliability.

Cost vs. Performance Trade-offs

MCM cost is determined by: substrate cost (ceramic substrates are more expensive than organic), layer count (more layers increase cost), die count and cost (the most expensive component in the MCM), assembly cost (die attach, wire bonding, flip chip), test cost (especially for high-frequency RF testing), and packaging cost (hermetic sealing adds cost but is required for military/aerospace).

The trade-off between MCM and alternatives (discrete ICs on PCB, system-in-package, or monolithic SoC) depends on volume, performance requirements, and reliability level. MCMs are most cost-effective at volumes above approximately 1000 units/year for ceramic substrates and above approximately 10,000 units/year for organic substrates, where the NRE cost of the substrate tooling can be amortised.

Substrate Comparison Table